A semiconductor device such as a programmable logic device (PLD) or a central processing unit (CPU) has a variety of configurations depending on its application. The semiconductor device generally includes a memory device; the PLD includes a register and a configuration memory, and the CPU includes a register and a cache memory.
These memory devices need to operate at higher speed in writing and reading data than a main memory generally using a DRAM. Thus, in many cases, a flip-flop is used as a register, and a static random access memory (SRAM) is used as a configuration memory and a cache memory.
The SRAM achieves high-speed operation with miniaturization of a transistor; however, there is a problem in that as the transistor is miniaturized, an increase in leakage current became obvious and thus, power consumption is increased. In order to reduce power consumption, an attempt has been made to stop supply of power supply voltage to a semiconductor device in a period during which data is not input or output, for example.
However, a flip-flop used as a register and an SRAM used as a cache memory are volatile memory devices. Therefore, in the case where supply of power supply voltage to a semiconductor device is stopped, data which has been lost in a volatile memory device such as a register or a cache memory need to be restored after the supply of power supply voltage is restarted.
In view of this, a semiconductor device in which a nonvolatile memory device is located in the periphery of a volatile memory device has been developed. For example, Patent Document 1 discloses the following technique: data held in a flip-flop or the like is stored in a ferroelectric memory before supply of power supply voltage is stopped, and the data stored in the ferroelectric memory is restored to the flip-flop or the like after the supply of power supply voltage is restarted.